Logictools Overlay

I am interested in using the z1 boards logictools overlay to implement in the PL boolean logic, that gives you the population of different combination of three inputs, based on an arbitrary delay delay between each.

Is it possible to implement this delay period in the PL of the Z1 and how would one assess how long these logical operations would take to complete, for a given set of inputs plus arbitrary delays?

Many Thanks

The boolean generator is using combinatorial logic. The IO will be registered, but there isn’t a programmable delay. You could customize the design to do this, but I’m curious about your use case and why you would want to do this. Can you share any more info?

I’m not sure what you mean by “asses”. You can design exactly how many clock cycles you would like this would take.