Hi, I’m using an RFSoC 4x2 board. I’m trying to write to two registers in an IP designed in Verilog. Through Vivado’s address editor, I can see that the start address is 0x9000_0000, and the respective register address offsets are 0x04 and 0x08. Ideally, I should be able to use code similar to this to view the contents in that memory location:
IP_BASE_ADDRESS = 0x9000_0000
ADDRESS_RANGE = 0x12
ADDRESS_OFFSET = 0x04
mmio = MMIO(IP_BASE_ADDRESS, ADDRESS_RANGE)
# data = 0
# mmio.write(ADDRESS_OFFSET, data)
result = mmio.read(ADDRESS_OFFSET)
However, this immediately crashes the Jupyter notebook kernel. Anyone have any ideas as to why? Thanks
Can you please share an image of the block design?
Does the IP show in the
Have you verified that your IP handles read/write as specified by the standard?
It looks like the IP is not responding, hence triggering a timeout. Or, you are trying to access a range of memory that is out of bounds for the PS.
Yes, the IP shows up in ip_dict with physical address 0x90000000.
How do I verify that the IP handles read/write as by the standard? I am attempting to use the AXI interface to do read/write operations.
I do not think that I am trying to access an out of bounds memory range, as I can view memory contents at higher addresses.
Is there any Xilinx IP that is connected to the same interconnect? Can you read/write from that one?
Can you please share an image of the full block design?
Through simulation or formal verification, this part is outside of the scope of this forum.
Hi, I fixed the issue. There was an address mismatch.