hi, i’m a student in Nanjing University. for my thesis work before degree i must make an implementation of the OpenFlow on a FPGA BOARD (PYNQ Z2) system. i must setup the system, then other student will continue to develop my system for other applications.
I ask you, if it’s possible, give me a guide to follow for setup the topology and a guide that explain me all the settings and the command that i must type in Verilog (VHDL).
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