Problem Using VDMA Driver With Only Write Channel

I am trying to use the vdma driver with only the write channel enable. However it complain of not finding the s2mm_introut. Is there a way that I can use the vdma driver with only the write channel?

I have the same problem, did you ever find a solution?

Darth

Can you confirm that you have not connected s2mm_introut? Maybe a block diagram would be better.

Hi,

I added read / write interefaces knowing i didnt need S_AXIS_S2MM as i was streaming anything into this block. The purpose of this block is to allow me to write from the PS, a frame captured by a webcam… and then send it thourgh an image processing pipeline. I have connected s2mm_introut as can be seen.

Also notice, i should have the master interface set to <none/free running> for sync purposes.

Darth

One comment is that make sure you have connected your interrupt pins like demonstrated in the base overlay (through that system interrupt controller). That way the interrupt dictionary might get parsed properly. I am not sure if this is the real reason, but you can give it a try.

Hi Rock

I have checked and the IRQ is wired up ok.

Do you have any examples of where you write to a VDMA block from the PS, same with a NP array containing a webcam captured image. I think the issue i have is related to how th eVMDA block is set up.

If you look at example 3 in this link… this is the sort of thing i wouild like to do…

https://forums.xilinx.com/t5/Design-and-Debug-Techniques-Blog/Video-Series-26-Examples-of-advanced-uses-of-the-AXI-VDMA-IP/ba-p/947566

Basically have a read only channel …

Darth

I checked that page you mentioned - Example 3 does not seem to connect any interrupt? Maybe first thing you want to try is to remove the connection of the interrupt coming out of VDMA block. I have a feeling that it might just work.

Tried it again,

  • Read only channel (write disabled)
  • No interrupts connected up (just like example 3 in the above Xilinx link)

Still failed…

I suspect the VMDA driver expect that both read and write channels are enabled as well as the appropriate IRQs wired. This is a real pain, as i thought there would be a need to do what i am trying to do, and inject captured webcam video into the PL for processing.

Capture2

OK. I see what you mean by that. Can you hook up the interrupt as you used to, and comment out this line in driver code:

The code on your board should be located at /home/xilinx/pynq/lib/video/dma.py.
I think what you suggested might be a good feature to add in the future release - allowing users to use only read or write channels conditionally. But for your debug purpose for now, you can give it a try by changing that dma.py.

Hi Rock,

Just letting you know ive fixed the issue. Can you make sure the issue is considered for the next release for Pynq.

See attached… dma.py modification. Will upload the pynq notebook in a separate post.

In summary i can now write from the webcam into the PL with a write only VMDA block, do some image processing and then read it back into the PS and display it.

Thanks for your help

Darth

Awesome! You can also open a pull request if you want to.

Thanks Rock. Sorry for asking a silly question, but how / where do you setup a pull request?