PS->DMA->BRAM data transfer?

[cathalmccabe]

You didn’t say how you are designing your IP.

If you are using HLS, you can add an AXI master interface that can access the PS memory directly. This is probably better than trying to copy to BRAM. No separate DMA required.

See this tutorial:

Tutorial: AXI Master interfaces with HLS IP

PYNQ HLS AXI Master tutorial Introduction Previous tutorials show how to build IP with AXI stream interfaces and how they can be connected in a Vivado project to an AXI DMA. The DMA can be controlled from PYNQ to send data to the IP and receive results. AXI stream interfaces are useful if you are connecting multiple IP together in a dataflow type architecture. However, you don’t have to use AXI streams and DMAs with HLS IP. HLS supports AXI master interfaces which can read and write data as r…

Cathal