Hi all,
I’m a newby to FPGA and I got a pynq-z1 recently. The board works fine and I made some small projects as tutorials to learn basic stuff (using vivado 2021.2 for making block designs)
But know I feel I need help. I want to use the pynq as a RF generator.
I made a block design that works by simulation (implementation works too but read the next for my question) :
It a very basic block design and all the datas to program it will come from the python code. The analog signal is outputted through “m_axis_data_tdata” and I made this as external (I’m not sure making it external is right)
I would like to connect it to a physical pin on the board. I thought about the PMOD pins but that where I need help, when and how do I indicate to vivado that I want “m_axis_data_tdata” output to go in a PMOD pin ?
I guess it has to do with the constraints file but yeah that’s it…
Thanks for helping me
As an example here is a screen shot of a simulation outputting a 10 mHz (ish) signal.
m_axis_data_tdata is 16 bits wide, so you would need to connect each bit to 16 pins.
You can find a complete constraints file for all the pins on the board here: https://reference.digilentinc.com/_media/reference/programmable-logic/pynq-z1/pynq-z1_c.zip
You can copy the pins you want, change the port name in the constraint to match the port in your design. i.e. m_axis_data_tdata
E.g. If you want to connect to Pmod B pins,
#set_property -dict { PACKAGE_PIN W14 IOSTANDARD LVCMOS33 } [get_ports { m_axis_data_tdata [0] }]; #IO_L8P_T1_34 Sch=jb_p[1]
#set_property -dict { PACKAGE_PIN Y14 IOSTANDARD LVCMOS33 } [get_ports { m_axis_data_tdata [1] }]; #IO_L8N_T1_34 Sch=jb_n[1]
#set_property -dict { PACKAGE_PIN T11 IOSTANDARD LVCMOS33 } [get_ports { m_axis_data_tdata [2] }]; #IO_L1P_T0_34 Sch=jb_p[2]
etc.
#
You then add the constraints file as a source to your project.
You can run each constraint as a Tcl command in the Vivado Tcl prompt. This would be a good way to check the constraints are valid.
An alternative way to add constraints is to synthesize your design, and open the IO planning view. You can then enter the pin constraints in the GUI.
W14, Y14, T11 …
You also need to set the IOSTANDARD; LVCMOS33 in this case.
You can then save the results of whatever you enter in the GUI as a constraints file that gets added to your design.
PS, you may see signal integrity issues depending on which pins you use (and the IO standard), but this is a nice project to try. If your goal is learning, I’m sure you will learn a lot!
Cathal
Thank you for the detailed answer =)
Indeed I want to learn and also use this project for a true application.
I naively thought that the pynq could output analog signal directly…
So it seems I need a DAC with a PMOD adapter then. Like this one: PMODDA3 SINGLE 16-BIT DAC MODULE 410-241 from digilent. It’s out of stock though…
EDIT: I’ll get this one Pmod R2R: Resistor Ladder D/A Converter - Digilent
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Not so naive ![:wink: :wink:](https://emoji.discourse-cdn.com/apple/wink.png?v=12)
You might find this interesting:
https://github.com/dawsonjon/FPGA-radio
You know, it’s not quite the application I’ll like to make but quite close, add a strong magnetic field and listen to, not people in the radio, but spin nuclei relaxing ![:wink: :wink:](https://emoji.discourse-cdn.com/apple/wink.png?v=12)