PYNQ: PYTHON PRODUCTIVITY

Configuring Output Pins in Vivado 2019.1 [PYNQ-Z2]

Background

  1. Using PYNQ-Z2 Image v2.6
  2. Using Vivado 2019.1

My Issue: I am creating custom overlays in Vivado 2019.1 that use the physical pins on the PYNQ Z2. The pins I configure don’t seem to receive inputs and outputs.

My Process:

  1. I put in my hardware blocks and related IP in the block design of Vivado.
  2. I want to have my custom RTL block to connect to two of the Arduino pins of the PYNQ, i.e. AR0 and AR1. So I right click and hit Create Port, configure it with a custom name, bit-width, and specify it as an in-out, and I connect it to the RTL block, which gives me no errors in the Validate Design.
  3. I then run a synthesis, afterwards I open the Elaborated Design where I click on I/O Ports, then click on the port I created and assign them a package pin (the ones for AR0 and AR1) and making sure the voltage standard is LVCMOS33
  4. Finally I save and generate the bitstream for the overlay.

After this process, I don’t see any signals on my configured pins. Is there another method or am I doing something incorrectly?

Thanks

use a .xdc file. there’s one available for pynq in the downloaded files. you just bind the correct nets from your BD your wrapper to the correct pins. try a VHDL/verilog blink first before getting yourself into trying to make an overlay using both the PS & PL. there’s a 125MHz clock available from the ethernet, or you can generate it from the ARM

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