PYNQ-Z2 -> Boundary Scan programming of the bitfile?

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1

Hi @cathalmccabe,

Chosen your name for this ticket because I’ve seen you replying to a similar matter to someone else early this year.

My current setup is the following :
I am using an older version of tool ISE 14.7 running this on Windows 10 via a Virtual Machine (VM). I created successfully a bitfile (programming file) of a simple counter module in VHDL.

Can I configure the device (zynq FPGA) on the PYNQ-Z2 board via JTAG (ie Boundary Scan) ?

I can see the target device + target bitfile listed after adding the Xilinx Device and selecting the successfully generated bitfile.

If I connect the board, power it up via the USB (selecting before hand JTAG boot mode using the correct jumper link) then will this program the zynq FPGA successfully via JTAG ?

Your prompt reply to this matter will be appreciated.

Regards,
Kevin

2

Hi @kanugent,

If you see the device from ISE you should be able to program the FPGA successfully.

Best,
Mario

3

Hi @marioruiz,

Yes, I can see the FPGA zynq xc7z020clg400-1 device but I was not able to inlude the pynq-z2 board files in the ISE directory like I did in the Vivado case (ie path I placed the pynq-z2 board files in Vivado was C:\Xilinx\Vivado\2019.2\data\boards\board_files\pynq-z2). It is better to be able to include the pynq-z2 board files if I can within the corresponding ISE directory. The only directory I could see was C:\Xilinx\14.7_VM\data\images but that is not a similar path). I managed to overcome this issue by selecting the pynq-z2 FPGA Device full name (ie xc7z020clg400-1) from the list.

**So, wrt my previous message, is this the correct procedure to follow : **

“If I connect the board, power it up via the USB (selecting before hand JTAG boot mode using the correct jumper link) then will this program the Zynq FPGA successfully via JTAG” ?

Regards,
Kevin

4

Hi @kanugent,
The PYNQ-Z2 board files are for Vivado. I am not aware of such files for ISE.

As you are using ISE, you need to select the FPGA manually as you pointed out.
Yes, that is the correct procedure to program the FPGA from ISE.

Mario

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