I am currently running Vivado 2019.2 with the new Vitis.
What I did :
I created successfully a simple up-down Johnson counter module in verilog and connected this in a block diagram together with a clock divider module in VHDL + linked this to a Zynq7 Processing System block. Created a wrapper & then synthesized / implemented & created a .bit file. I used as a target board the PYNQ-Z2.
I then exported Hardware (included the bitstream) creating an XSA file, launched Vitis, created a platform project for the zynq from the hardware specification (XSA). I also created an application project (app) (selected ‘Hello World’ that controls the hardware and generated a Boot Image (Boot.bin) & fsbl.elf
I then selected JTAG boot mode by putting the jumper link (JP1) to the furthest right (JTAG) and turn ON the PYNQ-Z2 board via the USB.power cable (had also Ethernet cable connected to the board)
Issue I have :
Then I went to the Vivado project, ‘PROGRAM AND DEBUG’ section, ‘Open Hardware Manager’ and tried to ‘open Target’ BUT I get “No Hardware Target is open!” message.
ie No Hardware targets exist on the server [localhost:3121]
‘Localhost status’ shown to be ‘connected’ but I cannot see the Zynq FPGA target device loaded (ie listed) to be able program the device.
There is something fundamental I am missing here!
Will appreciate your review comments to what I am doing wrong…
Your prompt reply to this matter will be appreciated.