[RF SoC 4X2] DMA invalid address

[matthew]

Hi Everyone,

I want to send a stream of complexes to another RF SoC 4x2 via analog waves. To do so, I want to send these complexes via the DAC port. I checked the notebook about RF converters: (https://github.com/Xilinx/RFSoC-PYNQ/blob/master/boards/RFSoC4x2/base/notebooks/rfdc/01_rf_dataconverter_introduction.ipynb)

But this notebook only configures the career signal, not the message signal. Thus, I added a DMA block in read-only mode to the base Overlay.
First, I know that the PS is linked to the transmitter block via this link:

Here is the previous transmitter block:

Here is my new transmitter block:

I let Vivado select automatically the addresses for the new DMA block and for the amplitude controllers.

The DMA block was similarly configured than a DMA block for the receiver:

But it was only the read channel that was enabled:

I generated the new bitstream. I uploaded to the transmission board the files of this new overlay (the .bit, the .hwh and the .tcl)

This new overlay and new dma block were recognized properly by the board:

Finally, I tested the new overlay by sending a buffer of complexes via the new DMA block. I don’t care about the reception currently. Here is the python code:

test_DMA_new_overlay.py (1.1 KB)

However, I got an error: RuntimeError: DMA Decode Error (invalid adress). I indicate the register maps before and after the failed transmission, but I see no error flag raised. The MM2S_SA source address has changed, the transmission was tried.

Any idea about how to fix this error?

I am using Vivado 2022.1 with the ML Enterprise license. I have Pynq 2.7 in my RF SoC.

Thank you in advance for your help

[matthew]

The issue was that the block ‘Amplitude Controller’ constituting channel_00 needed a direct connection to the Processing System (the AXI interconnect block helps this link). I added the DMA block between these two blocks, thus I generated the configuration issue.