[RF SoC 4x2] issue with the DMA real of the receiver block

Support
1

Hi,

I am working with the base Overlay, the provided one. I am testing the RF DC block. I am using the provided jupyter notebooks :
(RFSoC-PYNQ/boards/RFSoC4x2/base/notebooks/rfdc/01_rf_dataconverter_introduction.ipynb at master · Xilinx/RFSoC-PYNQ · GitHub)

I am doing a transmission. I want to extract the complexes received by the receiver in the AXI DMA. However, I am not receiving anything, a dma.wait() is running endlessly.

Has someone ever extracted data from any axi_dma_real? How did you do that?

I am transmitting via this python code:
test_DMA_receiver.py (1.2 KB)

I connected the DAC_B to the ADC_B.

Here is the register map for the axi_dma_real of channel[2] before the transmission :

before transmission
before transmission1302×458 13.4 KB

And here it is after the transmission:

after transmission
after transmission1296×551 14.2 KB

I have checked a tutorial for possible errors:
Debugging Common DMA Issues [Part 3] - Learn - PYNQ

However, my TKeep is disabled and the array I am transmitting is of the maximum size. So I do not know where my error is.

Thank you in advance for your assistance

2

Hi @matthew,

For clarity,

  • did you change anything in the base overlay?
  • have you tried with a smaller buffer size?

Mario

3

Hi,

I did not change anything in the base overlay.
I tried with a buffer shape of 10, 64, 640 and then 6400. Nothing worked, still got the endless wait.

4

After some tests, I concluded that accessing directly the content of the DMA blocks directly is not possible because the data is formatted by the packet generator. The best way to access these data is via the “transfer” function of the class ‘AdcChannel’, shown here:

This function will provide the complex detected by the ADC.

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