Hello everyone, I got this error while runing my code, I’m new to this and I don’t really understand where is the error or what does this error means, ,
Thank you!
The error is telling you the DMA is not idle, so the transfer() can’t start.
Do you get the error the first time you run this code, or do you get it after you run this code multiple times? I see you are at [76] cells that have been run.
Can you share the whole notebook, details of the hardware design, and board you are using, PYNQ version and any other relevant details?
Cathal
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Hello Cathal, Thank you for replying me,
You’ll find attached the whole notebook, screenshots of the block design on Vivado, also I’m using the Ultra96 v2 board
PFE-maj-Copy1.ipynb (622.6 KB)
Farah
Your config port for the FFT block is unconnected.
Your notebook doesn’t seem to be running on the board - I see an error that it can’t find pynq.
Can you make a really simple notebook with the code to test the DMA only and check that?
Cathal
Cathal
Should I connect it to the m_axi_mm2s_aclk and m_axi_s2mm_aclk or to the s_axi_lite_aclk?
And yes I was not running on board because I don’t have it in my hands but I will test it and post the result as possible.
Thank you for your respond
Farah
Even though it looks like they have different names inside the hierarchy, I think all your clocks are connected to ps_clk0 so I think this is fine.
Let me know if I did not understand your question.
Cathal
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Yes right all the clocks are connected to ps_clk0, I connected now thes_axis_config_data to the ps_clk0 and the design is validated, is it right?
Farah
I’ve tried with a test code (attached and I got the same error)
test1.ipynb (2.8 KB)
