@DarthSimpson the space you allocate can be significantly smaller than the buffer length register. It may (I’m not clear on this, I imagine @Rock is) need to be multiples of the stream MM word size configured in the DMA core if unaligned transfers aren’t allowed AND/OR you may need to index when sending data so that your first send index is a multiple of the MM word size. For instance if you allocate a np.uint16 buffer and have a MM word size of 128 you may need to only start transfers from indices i*8, I’m not sure this was inherent in my data so I’ve never played.
I’ll update this when I know more. I pretty drastically oversimplified in my initial post. Rock is very much correct that trying to kick off a receive when the DMA core hasn’t gotten an inbound TLAST for S2MM will result in the message I posted.
In my case I don’t think that was the problem as I think I was kicking off a MM2S transfer that was smaller than the buffer length window into a pipeline that does not produce back pressure.
@rock I’d also configured an axi stream switch and a second DMA to try and support capturing data at different points in my pipeline. I gave up on that for now so if the problem comes back as I reintroduce it it might help sort out the root cause.