VDMA frame generation outputs splits expected frames

Support
1

Hi, I am building a module to generate pixels and output to a juypter notebook via VDMA. When running the verilog on verilator and icarus simulations, i get expected results. However, when I run the notebook and call readframe on VDMA, i do not get the expected image. However, i get the expected image split - so the expected image is almost split vertically and one portion which is meant to be on the right is on the left - as the image i get is a snapshot taken between 2 frames.

When i call readframe via the notebook, the amount the frame shifts by changes. The longer i wait, the greater the shifting of frames.

What is the cause of this and what might be a fix?

2

Hi @rgbblue,

Welcome to the PYNQ community.

This is most likely because the AXI4-Stream sideband (tuser & tlast) signals are not compliant with what the VDMA expects.

Have you checked that these signals are asserted as indicated by the AXI4-Stream video specs?
https://docs.amd.com/r/en-US/pg322-v-scenechange-detect/AXI4-Stream-Video-Interface

Mario

3

What would be the best way to check this,

I was provided an external testbench to check for start of frame(tuser) and end of line (tlast) signals, the pixel generation module seemed to generate these signals fine.

4

You can try with an ILA to verify that the signals are correct.