Vitis Vision Library Vivado Design

Hi all,
I am trying to reproduce the Hello-world accelerated resize OpenCV function. I have successfully exported the IP block. However, I am now stuck on the Vivdao design. I added the Zynq processing system and the Resize IP generated using Vitis HLS but How to complete the whole design.
I am new to this field, I tried to follow these links without a successful result.

I tried to add these blocks one by one and connected them line by line, but some inputs/outputs are not the same. I have to customize some blocks but I do not know how?

Could you please help me achieve my design and recommend me some tutorials or links to achieve this project.
Thanks in advance

The second blog you’re pointing to is from me. I couldn’t get it working at the time.
This is resolved when you use the latest available Hello World project from github.
See discussion on github: Update to 2020.2 by mariodruiz · Pull Request #26 · Xilinx/PYNQ-HelloWorld · GitHub

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Hi Jan Camps

Thank you for your reply and for sharing your experience

For Vitis HLS, it worked for me, and I am now stuck in the Vivado design.

For HLS code, I should mention that the new Vision library returns an error in the following line

typedef xf::cv::ap_axiu<DATA_WIDTH,1,1,1> interface_t;

It does not recognize ap_axiu as a member of xf::cv::

And you should merge it with the following line:

typedef hls::stream<ap_axiu<DATA_WIDTH,1,1,1>> stream_t;

Jan Camps, If the Vivado design worked for you, could you please share it with us. I enabled the GP0 and HP0 Axi interface and added DMA and Axi Data width converter, but when I run automatic connection, I cannot get the same design, and it returns many errors

I used the Vision library that matches the version of the example. If you check out the repo recursively, it automatically downloads the lib it compiles with.

I didn’t make a Vivado design. The repo has the make and Vivado tcl scripts to automatically build the design and overlay files.

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Thanks a lot for your help jancumps