I managed to get the AXI Debug Bridge working on the Ultra96 with a Jupyter notebook that implements the XVC protocol. The aim there was to perform JTAG debugging without needing the JTAG adapter for the board. It’s not particularly quick but it seems to work.
I’ve put the notebook up as a gist and attached the bitstream/tcl/hwh file as a zip file. It’s built on top of 2018.3. It uses the Debug Bridge IP to connect the JTAG chain to and AXI slave port and has a DMA engine in fabric with the ILA attached to its AXI interfaces to provide something to look at inside of chipscope.
If you want to connect the JTAG pins to something externally you should just be able to change the Debug Bridge configuration and re-use the same server code. All of this code is based on the xcvServer example.
Peter
u96_chipscope.zip (472.2 KB)