PYNQ: PYTHON PRODUCTIVITY FOR ZYNQ

Problem with Using integrated logic analyzer (ILA) for Debugging with PYNQ

Hi all,

I am using pynq with a Jupyter notebook environment with a RFSoC ZCU111 board. I want to debug an overlay created by myself using ILA core in Vivado. I have inserted the ILA core into the design. Then I use the overlay class in pynq to program the device.
The problem that I am facing is that when I open the hardware manager in Vivado and connect to the board using the Jtag interface, I lose my Ethernet connection to the board and I cannot run the program anymore in Jupuyter notebook.
Any suggestion to help me out?

regards,
Reza

Maybe add VIO so you can control the design?

hi, rock,

Is it expected to loose Ethernet connection once use of ILA debugging via the JTAG interface in Vivado on PYNQ as you know?

Hi,

Why does that happen?