I do not understand the concept of the TLAST what I did was implement a AXI4-Stream DATA FIFO and enable the TLAST there
This will only “pass through” TLAST. As there is no TLAST signal coming from the source, this will have no effect.
You need to manually generate a TLAST signal. For example, you could create a new IP that acts as a counter and generates a pulse after a certain number of valid signals. You would use the “pulse” as the TLAST signal.
It may help to look at this example design;
https://github.com/strath-sdr/pynq_nco/
In particular the axis_packet_controller IP
https://github.com/strath-sdr/pynq_nco/blob/main/boards/ip/iprepo/axis_packet_controller/hdl/tlast_generation.vhd
Cathal