PYNQ version & Board name & Tool Version:
- PYNQ: latest (3.0)
- Board name: pynq-z2 (xc7z020clg400-1)
- Tool version: Xilinx Vivado 2023.1
My design consists of a custom IP, with an AXI4-Lite compatible interface. I followed the tutorial and Vivado automatically connected the IP to the
M_AXI_GP0 of PS.
However, the IP directly takes the AWADDR/ARADDR as the control word or opcode. In order to control the IP, I need to use something like
device.write(addr, data) or
pynq.axigpio does not support read/write with an address. So my question is:
- Does Pynq provide some kind of “low-level” API to manipulate the port-level signal for the interface over
- Do other AXI ports support reading/writing with address, and how should I switch them?
Thank you so much!