Hello. Trying to re-trace my steps and set up another ZCU208 board with the prebuild PYNQ 3.0.1 image, but running into a problem that I now can’t help but recreate on the original board. Neither are working as intended.
I’m seeing the behavior that I described in this post, which I then solved (at the time) by grabbing the LMK file from THIS post, and everything has worked pretty well since then. Unfortunately, this is no longer the case, and the solution of just dropping in a different register file for the LMK04828 doesn’t work.
Some symptoms of the problem:
As before, trying to generate a clean frequency at 15MHz outputs instead something around 14.12MHz, and this offset scales with the frequency, so this is an indicator of a clocking offset.
Running the set_xrf_clks function with the correct LMK and LMX frequencies no longer lights up all the PLL lock LEDs on the CLK104 board (described here). 21 lights up, but 19 and 22 do not, indicating that there’s no lock between the clock on the ADC/DAC tiles and the CLK104 output.
I’ve tried resetting back to the original register files, and I’ve generated different files using TICS that cause all the lights on the CLK104 board to light up, indicating a good lock between the devices, but then checking the BlockStatus output of the RFDC tiles shows that the clock path status is ‘0’.
Has anyone come across similar behavior and solved it? Any help would be greatly appreciated.
Thanks in advance,
Reid