DMA not Idle from starting

Hi guys, I need some help right here. So I am using PYNQ Z-1 board for a project using DMA. In short, I have made sure that my RTL complies with the AXI-S protocol (checked it via ILA and jupyter notebook outputs). I have also tried creating a project with only that RTL and DMA necessities, the project worked completely fine (the design is presented below). By the way, the axi_param_controller is just driving constants, and it is outside of my concern right now.

I confirmed that:

  • DMA immediately goes into IDLE mode right after I turn it on
  • After every process, DMA goes back into IDLE

Now comes the problem. I merged this RTL with some others, and they are using the same DMA stream. I select the branch used by driving a selector port from a multiplexer. The diagram is shown as follows:

(((I’ll put FIG 2 in the comment)))

To make sure that there are no clashes between wires, I also drive different reset signals for every branch, like this:

(((I’ll put FIG 3 in the comment)))

I tried to run the software using jupyter, however I realized that:

  • After I load the overlay, the DMA never gets into IDLE condition (checked it using its register_map)
  • Transfer can still be done, but the result is missing its last output data (perhaps because the starting of the DMA module was not proper enough)
  • Timing and net constraints are met

Can anyone suggest me what might cause this, especially on why the DMA never goes IDLE? I couldn’t take a closer look using ILA in my new project, as the resource is already almost full.

FIG.2 :

FIG 3:

Can you please send the code you are using for the DMA transfer? Can you also send the register maps before and after the transfer?

Did you check this tutorial?

Debugging Common DMA Issues [Part 3]

Hi matthew, thank you for answering. I have checked the link you gave, and none of them suits my case.

I tried to recreate my project and it all somehow works well now. I am not sure what I did wrong, but I think it is more likely cuz of some kind of bug (I am using Vivado 2019.1, btw) or maybe I was being clumsy. But honestly I don’t see any difference between the new and the old project. Will update later if I find anything significant :slight_smile: