Does ZCU104 PYNQ base image support PL DDR SODIMM?

As from subj - ZCU104 has unpopulated connector for adding a second DDR SODIMM module.
Is this second DDR supported by ZCU104 PYNQ base image?
Any example/docs about adding and using this second DDR?


We don’t have an example design on using this but if you add a MIG into your bitstream it will work. I’ve successfully used one of these in my ZCU104 although it looks like they are out of stock at the moment. It won’t be seen by Linux so you’ll have to manage buffers in the PL DRAM on your own for now. We’re looking at better supporting PL DRAM in a future release.


1 Like

Many thanks for this feedback. If possible can you you please elaborate more these two points:
1- Linux won’t see the RAM - why? in theory it should see the PL DRAM if I correctly map it in memory and correctly rebuild the PYNQ image for the new PL image - but not clear to me where (and if) in the PYNQ image build flow the Vivado hdf/xsa with the memory map is taken in the petalinux build, i tried to dig into the scripts but I didn’t find it
2- buffers in PL DRAM: I guess I have also to manually add DMAs from buffers to PL DDR and manually manage all the transfer host <-> PL buffer <-> PL DDR (sounds as a little burden) right? any example?

Many thanks in advance!

It is possible to modify the device tree and have Linux see and use the additional memory in its normal pool but that’s a bit beyond the scope of a PYNQ Overlay. You would need to create a custom BSP with your design and pass that in place of the standard Xilinx one. You’ll also need to set FPGA_MANAGER_ZCU104 := 0 in the spec file and add your new memory space to the memory device-tree entry. Doing this will give you a ZCU104 with 6 GB of RAM but there’s no way to allocate memory in one region or the other.

Using the standard image and boot files, you don’t need strictly speaking need a DMA to access the PL DRAM - you can attach the MIG to one of the AXI Master ports on the PS and then use the MMIO class to read and write from the memory.