Hello everyone,
I have a Vivado design in which I have an HLS accelerator that accesses DRAM memory through an m_axi interface with slave offset. DRAM is made available to the accelerator through the HP0 port in the Zynq CPU. This works fine with the full bitstream. However, once I program the FPGA with a partial bitstream the accelerator becomes unresponsive (ap_start stays at 1 and there is no output). This gets solved when I program the FPGA with a full bitstream again.
The design is as follows:
I was wondering if this had something to do with how I am decoupling the m_axi port, but it has worked before with similar designs and whenever there was a problem with decoupling the whole FPGA blocked, whereas here the pblock that is not reconfigured by the partial bitstream remains usable (this applies when I extend the design to two pblocks).
Just to clarify, this exact same design has worked before with partial reconfiguration when the interface of the HLS accelerators comprised only s_axilite ports. I’m working with PYNQ-Z2.
The kernels I’m instantiating are at pblock 0 are:
#define SIZE_IN 10
#define SIZE_OUT 10
void add(int input[SIZE_IN], int output[SIZE_OUT]){
#pragma HLS INTERFACE s_axilite port=return bundle=CTRL_BUS
#pragma HLS INTERFACE m_axi offset=slave port=input
#pragma HLS INTERFACE s_axilite port=input bundle=CTRL_BUS
#pragma HLS INTERFACE m_axi offset=slave port=output
#pragma HLS INTERFACE s_axilite port=output bundle=CTRL_BUS
for(int i = 0; i < SIZE_IN; i++)
output[i] = input[i] + 10;
}
and
#define SIZE_IN 10
#define SIZE_OUT 10
void add(int input[SIZE_IN], int output[SIZE_OUT]){
#pragma HLS INTERFACE s_axilite port=return bundle=CTRL_BUS
#pragma HLS INTERFACE m_axi offset=slave port=input
#pragma HLS INTERFACE s_axilite port=input bundle=CTRL_BUS
#pragma HLS INTERFACE m_axi offset=slave port=output
#pragma HLS INTERFACE s_axilite port=output bundle=CTRL_BUS
for(int i = 0; i < SIZE_IN; i++)
output[i] = input[i] + 20;
}
Thank you.
Edit:
I’ve attached a simplified a design so it’s easier to find the answer.