Hello!
I have question about pl-custom.dtsi and fpga manager.
How should I modify it to add extra properties to pl.dtsi fragments?
I googled this problem, but still no luck :
This is topic on Xilinx forum with this problem, but then I thought that PYNQ community would know more about overlays and fpga manager.
What doesn’t work… this is placed in pl-custom.dtsi
***************************************************************
/dts-v1/;
/ {
&{/fragment@2/AXI_ZmodADC1410@43c00000} {
compatible = "generic-uio";
};
};
***************************************************************
/dts-v1/;
/ {
fragment@2 {
target = <&amba>;
overlay2: __overlay__ {
ZmodADC_0_AXI_ZmodADC1410_1: AXI_ZmodADC1410@43c00000 {
compatible = "generic-uio";
};
};
};
};
***************************************************************
/dts-v1/;
/ {
};
&{/fragment@2} {
overlay2: __overlay__ {
ZmodADC_0_AXI_ZmodADC1410_1: AXI_ZmodADC1410@43c00000 {
compatible = "generic-uio";
};
};
};
***************************************************************
/dts-v1/;
/ {
&ZmodADC_0_AXI_ZmodADC1410_1 {
compatible = "generic-uio";
};
};
***************************************************************
/dts-v1/;
/ {
&{/fragment@2} {
&ZmodADC_0_AXI_ZmodADC1410_1 {
compatible = "generic-uio";
};
};
};
***************************************************************
Is modification to overlays possible?? I just don’t know