Https://github.com/strath-sdr/rfsoc_qpsk

Support
1

Hi I am trying to generate the design in Vivado but getting error.

Please specify the procedure to create it.

  1. hardware project
  2. Software Project

Regards
Hyanki

2

Hi @hyanki,

Welcome to the PYNQ community.

Can you elaborate what error you’re getting?

The instructions to rebuild are here GitHub - strath-sdr/rfsoc_qpsk: PYNQ example of using the RFSoC as a QPSK transceiver.

Mario

3

Dear Mario
Today i cound generate the project now i need detail about architecture and below is my query.

  1. How driver software is running? Is it baremetal or linux?

  2. If it is linux can i run it in baremetal?

  3. Specification of QPSK parameter like what is symbol rate, RRC factor, carrier recovery range etc?

  4. At what carrier frequency RF DC is configured?

Regards
Hyanki

4

The description in in the paper they are linking in the introduction. GitHub - strath-sdr/rfsoc_qpsk: PYNQ example of using the RFSoC as a QPSK transceiver.

  1. Linux with PYNQ
  2. Probably, but you will have to write the drivers yourself
5

Dear mario
I got some information here but i have below doubt.

  1. Carrier drift can handle in receiver?
  2. Is there any IDE to do development of software?

Regards
Hyanki

6

Dear marioruiz
I have gone through the doc and seen the specs. Now I am looking that
if i wanted to change modem parameter then how i can do and how can i
update in other blocks and in which IDE software will develop?

Regards
Hyanki

7

This design was likely designed with Model Composer (Simulink) and Vivado.

Mario

8

So it means i can change the parameters and run with the PTNQ?