Hello everyone, I’m working with PYNQ Z2 using Vivado 2018.1
I was trying to follow this tutorial: https://support.xilinx.com/s/article/932553?language=en_US published 2 days ago, where it is showed how to develop an hdmi_out video output.
I followed it properly but when I try to run the synthesis it gives me this error:
module 'design_1_v_tpg_0_0_v_tpg' not found
which is related to the Video Test Pattern Generator IP
This leaded me to the following link which is supposed to give the solution to the problem:
https://support.xilinx.com/s/article/70400?language=en_US but the instructions presented in the solution (the instructions that should be run in the tcl console) are not working.
In general I’m trying to develop an hdmi video pipeline that takes the input video, processes it with a custom IP core and outputs the result through the hdmi out port. Do you have any ideas on how can I realize that ?