PYNQ 3.0.1, ZCU208
Having trouble initializing a single ADC and DAC block to take data into the ADC and feed it out through the DAC to an oscilloscope.
It seems like a lot of these things assume a base level of knowledge that I am severely lacking. Here are some screenshots…
I have the clocks set up in a way that seems intuitive – The output clock from the ADC and DAC are exactly the required streaming clock frequencies, and so drive the AXIS ports.
I generate and export the bit, tcl, and hwh files and load them into an overlay in Jupyter.
Am I reading these correctly?
Going through these cells seems to reveal that these tiles aren’t actually receiving any valid clock signal, and that the ADC tile is stuck in the very first step of its startup sequence?
What step have I missed here? Is something not correctly initialized?