Pynq 2.6.1 XRT - Zynq

I’m trying to use pynq Edge XRT platform.

I have created spec file like this:

ARCH_Eclypse-Z7 := arm
BSP_Eclypse-Z7 := Eclypse-Z7.bsp
FPGA_MANAGER_Eclypse-Z7 := 1

STAGE4_PACKAGES_Eclypse-Z7 := xrt pynq ethernet pybind11 opencv bootpy
Screenshot from 2020-10-30 16-12-40

But I can’t run Vitis program. Does FPGA-Manager work with XRT? or should I disable it?
IN rootfs config:
CONFIG_packagegroup-petalinux-opencv (6.2 KB) (3.2 KB)

FPGA-manager can work with XRT; it will be just polling mode instead of interrupt mode. For edge platforms, just use Overlay('bitstream.bit') instead of the xclbin; I am not sure at this point if XRT can support bitstream reloading from the xclbin file.

hmm but now it doesn’t detect system.bit as xrt platform

I used to have the bit, hwh, and xclbin all with the same name and the same folder. e.g. dpu.bit, dpu.hwh, dpu.xclbin all sitting in /home/xilinx/jupyter_notebooks/dpu/.

It doesn’t work :\ also I have tried turning off FPGA-MANAGER FPGA_MANAGER_Eclypse-Z7 :=0 but the system wouldn’t boot. Guess for now I will use pynq petalinux flow for this :frowning:

What error message have you seen? Also, what vitis platform have you used? For the kernel.start() call, I have not used it before on edge platforms. Maybe you want to start with a simpler design, something like:

I would also start with C++ code first to see if that is the problem of the python code.

Now have double-checked.
This design runs on petalinux without FPGA-Manager.
If I create PYNQ system with “FPGA_MANAGER_Eclypse-Z7 := 0” in spec file “System Hangs on starting kernel…” I have created new boot.bin from petalinux project and system boots but xrt doesn’t work.
Screenshot from 2020-10-31 18-12-38
Screenshot from 2020-10-31 18-17-16
All project files are here

Also, I have an additional question. Why FPGA-manager is preventing xrt from working in petalinux-flow?

The idea is this: if you enable FPGA_MANAGER, the interrupt will be disabled, and your device tree won’t have this segment. In this case, the AXI interrupt won’t be available so your XRT cannot work in interrupt mode. On the other hand, if you disable FPGA_MANAGER, you can support AXI interrupt since that segment will be added back; however, you lose the bitstream reconfigurability as a tradeoff.

The underlying reason is that AXI interrupt cannot be dynamically loaded as a device tree dtbo file. This is a known linux issue.

The reason why you have seen linux booting hangs at “starting kernel” is most likely to be the AXI interrupt mismatch - you may have enabled AXI interrupt in device tree, but your boot bitstream does not have that block design.

I have left only PS in my block design and deleted XRT references for XRT in petalinux-project. Still same error. cutecom.log (22.4 KB)
I don’t know what can I do besides petalinux flow for pynq…

Is seems like PYNQ doesn’t accept xclbin…
RuntimeError Traceback (most recent call last)
in ()
----> 1 ol = pynq.Overlay("/boot/system.xclbin")

/usr/local/lib/python3.6/dist-packages/pynq/ in init(self, bitfile_name, dtbo, download, ignore_version, device)
354 if download:
–> 355
357 self.doc = _build_docstring(self._ip_map._description,

/usr/local/lib/python3.6/dist-packages/pynq/ in download(self, dtbo)
417 Clocks.set_pl_clk(i)
–> 419 super().download(self.parser)
420 if dtbo:
421 super().insert_dtbo(dtbo)

/usr/local/lib/python3.6/dist-packages/pynq/ in download(self, parser)
186 “”"
–> 187, parser)
189 def remove_dtbo(self):

/usr/local/lib/python3.6/dist-packages/pynq/pl_server/ in download(self, bitstream, parser)
758 def download(self, bitstream, parser=None):
759 if not bitstream.binfile_name:
–> 760 _preload_binfile(bitstream)
762 if not bitstream.partial:

/usr/local/lib/python3.6/dist-packages/pynq/pl_server/ in _preload_binfile(bitstream)
550 bitstream.firmware_path = os.path.join(’/lib/firmware’,
551 bitstream.binfile_name)
–> 552 bit_dict = parse_bit_header(bitstream.bitfile_name)
553 if bit_dict != bitstream.bit_data:
554 bitstream.bit_data = bit_dict

/usr/local/lib/python3.6/dist-packages/pynq/pl_server/ in parse_bit_header(bitfile)
541 bit_dict[‘data’] = contents[offset:offset + length]
542 else:
–> 543 raise RuntimeError(“Unknown field: {}”.format(hex(desc)))
544 return bit_dict

RuntimeError: Unknown field: 0x0

But why??