PYNQ: PYTHON PRODUCTIVITY

Pynq-z2 PWM output

Hi all,

I have a project developed for the z1 version of the Pynq. This was relying on a PWM output (AUD0PWM) that was further filtered with the 4th-order low pass Sallen Key filter already onboard and it was super super handy (page 5 Digilent Schematic).

The z2 version seems to not have this filter anymore ( TUL schematic ) .

Is this correct? Is there a DAC onboard that I am missing? How’d I access the DAC from the fabric?

The project is really simple, I have AXI stream samples going directly into a custom timer I made ( vhdl ), the axi value sets the duty cycle, and the output goes directly on the PWM pin before the filter.

I am using this as a custom overlay, and I am not using PMOD or any other external module (both HW or SW), nor I need them for now.

If it’s true that there is no DAC that accepts AXI streams nor an onboard low pass filter, than what would be the fastest way to update my design to work on this board?

Thanks!
Francesco.

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Hello,

The z2 version seems to not have this filter anymore ( TUL schematic ) .

Just FYI: Z1 and Z2 don’t seem to be versions, but just two different boards produced by two manufacturer.

If it’s true that there is no DAC that accepts AXI streams nor an onboard low pass filter, than what would be the fastest way to update my design to work on this board?

Solder an RC Filter with throughout components between your wire ?
It’s fragile, but for desk experiment, it should be fine.

Need higher order ? Cascade them.

I am using this as a custom overlay, and I am not using PMOD or any other external module (both HW or SW), nor I need them for now.

If you are fine with getting a PMOD, here is a 5$ R-2R ladder DAC that could be suitable, you would just need to latch the AXI4Stream register and send it on the pins.
Delivery fees can be expensive abroad though.

Is this correct? Is there a DAC onboard that I am missing? How’d I access the DAC from the fabric?

There is an ADAU1761BCPZ audio DAC/ADC.
I don’t know how valid, but replacing C214 C215 with resistors to have DC could do the trick.
Both I2C and I2S are connected to FPGA io banks.

Mikaël
Random Xilinx user

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