I’m trying to use PYNQ-ZU board to run FFT. I followed the step-by-step guide provided by xilinx here. The pdf guide is here. After I finished the block design in vivado and ran synthesis, I uploaded the .bit file, the .tcl file and the .hwh file to the PYNQ-ZU board and imported the FFT overlay in a jupyter notebook. But the fft IP could not be found, while other IPs like dma and fifo could be detected successfully, as shown below.
I use PYNQ-ZU with image v2.6 and vivado 2020.1. Need to mention that in the step-by-step guide here, the author uses PYNQ-Z1 board. So in the guide the zynq PS IP in the block design (zynq) is different from that in my block design (zynq UltraScale). Some ports may be different, like IRQF2P port in zynq IP while pl_ps_irq port in zynq UltraScale IP. Could this be the problem?
Just from what I experienced in before about DFT IP had a simulation issue on Vivado 2020.2.
I am not sure about FFT but short search also see a lot of issue and path so paid a bit attention to the patch is handy.
See issue about DFT here
Ensure you had patch the DFT as well on Vivado 2020.2 IP if you need to use that.
Sorry I haven’t replied for so long. Lately I’ve been busy with another project. The tutorial you recommend made by Cathal is really great, which explains the details thoroughly. As you said before, the key is how to transfer and receive data using DMA. Now I successfully run the hardware FFT. Many thanks for your kind help!