RFSoC 4x2 Bypassing mixer and saving sampled data to a file

Support
1

PYNQ version 3.0.1
Board name: RFSoC 4x2
Vivado version: Vivado 2022.1

Aim: I would like to sample a real signal with different frequencies using ADC and print the sampled data in jupyter notebook.

Problems:

  1. I am unable to bypass the mixer using pynq(python) so, I tried to modify the base.tcl design and followed the discussion I have encountered the same issues but I am unable to solve the final issue to reset output products as mentioned discussion even after I went to sources → IP Sources → base → reset output products I am getting the same issue again. Am I doing the last step wrong because the discussion is not clear when he said

Note: I have tried without modifying the base.tcl even then I ran into the same error again.

  1. Will it be ok if I just changed the ADC mixer to bypass mode without changing any connections in the base design and use the bit stream generated to sample real data?

  2. How to program the adc_clk so that I can sample at variable frequencies rather than the default one.

Any suggestions or replies can help.

Thank you.

Cheers.

2

You can bypass the mixers anytime with xrfdc software drivers. It has nothing to do with the hardware design.

You can check out the xrfdc driver and its python wrappers. For example:

adc_block.MixerSettings = {
            'CoarseMixFreq':  xrfdc.COARSE_MIX_BYPASS,
            'EventSource':    xrfdc.EVNT_SRC_TILE,
            'FineMixerScale': xrfdc.MIXER_SCALE_1P0,
            'Freq':           0,
            'MixerMode':      xrfdc.MIXER_MODE_R2C,
            'MixerType':      xrfdc.MIXER_TYPE_COARSE,
            'PhaseOffset':    0.0
        }

Not sure if this would work. I just copied and modified this snippet from here.

3

Hello,
Thank you it bypassess the mixer.
But there is a small issue, whenever I input any signal its amplitude is not correct. That is if I input a 100MHz sine-signal of Vmax 500mV the peak value is shown as 800-850mV. Similar thing happens for a trapezoidal signal of frequency 50MHz.
My Function generator impedance is 50 ohm. Is it because the impedance mis-match?
Or am I sampling it wrong?
I am happy to provide any extra data. Thank you.

4

Hi @crypty_potato ,

I would like to add this information; when you create your .bit file, if you made your settings bypass mixer, the default settings should come with.

I am facing the same situation. I don’t know whether it is caused by impedance missmatch or internal error.

To your question, in the reference manual, it says they are using MABA-011118 baluns, which are terminated with 50 ohms. However, in the schematic, it shows internal circuit is terminated with differential 100 (they might made 50 on each pair, not sure, not a PCB designer).

Another issue could be the how they designed the RFDC. When I was researching on the topic I found this table for Gen1/Gen2 RFDC.

image
image1350×685 91 KB

If they use the same principle for the Gen3 RFDC, you might need to shift it to get the correct result. I tried shifting with 10 MHz signal, it was somewhat in range considering the loss on the cables. 20 MHz+ waves were still similar to yours.

You can easily check the sampling from the sampled signal in time domain.

Can you check your signal with 55 ohm or 100 ohm?

Hope these could help!

5

Hello @mtsanic,
Thank you for your response, Unfortunately I am unable to check with 100 ohm. I am planning to check by loop back from DAC. I am assuming the impedance of DAC and ADC is matched in loopback condition. So, that I can verify if the issue is with impedance mismatch or internal error.
As you pointed out MABA-011118 baluns input is 50 ohms. Thank you for clarifying.
I have right shifted the output and still the issue persists because it is due to alignment issue.
Coming to 10MHz signal case I think that is on the border of the bandwidth of the balun, so, we should test only for signals greater than 10MHz.
I will let you know the result of loopback.
Thank you.

6

Hi @crypty_potato ,

I am currently using loopback with RFSoC 4x2, sorry to forget mentioning it, unfortunately, problem still persists. That is why I suggested redesigning with different impedance. Are you using PLL?

BTW, I can see 10 MHz signal to be sampled, it didn’t show any issue.

Best.

7

Hello @mtsanic I am using the base design without modifying anything. I am attaching my notebook here for your reference.
ADC-Sampling.ipynb (3.6 KB)

Can you share your notebook if possible to know how you implemented loopback. I am currently using function generator to generate the signal and sampling it using the code.

The sids.bit is generated disabling the mixer in the base design. Didn’t do any modifications other than that.
sids.hwh (4.1 MB)

sids.bit: https://drive.usercontent.google.com/download?id=1FHNqLO8VngmVabUpPMmWLFMgkleLywIQ&export=download&authuser=3

8

Hi @crypty_potato,

Unfortunately, I currently not allowed to share the files. Moreover, my design or notebook wouldn’t help your case, as I use custom designed IPs. In my design whole information is embedded on the FPGA, function only changes based on the information I want to send. I reread the whole thread again, I realized I made some mistakes. You need to change I/Q mode real->real mode. That might help, but that will change the clocks as well.

Do you mean you are using the original code in the notebooks (like in the below)?

def set_transmitter_channel(channel, enable, gain, frequency):
channel.control.enable = enable
channel.control.gain = gain
channel.dac_block.MixerSettings[‘Freq’] = frequency
set_transmitter_channel(base.radio.transmitter.channel[0], True, 0.8, 900)
set_transmitter_channel(base.radio.transmitter.channel[1], True, 0.1, 1500)

If you want to change sampling, you will also need to change the clocks of LMK and LMX clocking components. Check out RFDC Start Up Fail - ADC 0 timed out at state 7 in XRFdc_WaitForRestartClr topic. You need to use TICSPRO to change your sampling and clocks.

Feel free to reach out if you have any other questions.

9

No, I am using a keysight device rf function generator which generates 50MHz and 100 MHz signals.

I forgot to mention but I changed that too. But it didn’t change my clocks though I have same clocks before and after modifying it. It just doesn’t have Imaginary data axi-stream.

For now, I doubt changing only this is giving the issue. I tried reading the code in links suggested by @godfly. I tried changing ‘MixerMode’: xrfdc.MIXER_MODE_OFF and it is throwing error.

I also don’t exactly understand how this is configuring my adc. Any help regarding this is appreciated. Thank you.

10

Do your sampling match with keysight device? Can you also share RFDC settings?

I don’t think you can turn it off, instead you can just bypass it.

Best