Synthesys of base overlay using source ./build_bitstream.tcl for base overlay

Support
1

Hello,I have installed base ovelay using source ./base.tcl command.When I pressed the synthsys button I got a massage that there is no top module .
Later I was told that in order to be able to do synthesys I need to run .
“source ./build_bitstream.tcl” command

However when I ran this command I got an error shown below in the log.
Why cant I run synthesys and why source ./build_bitstream.tcl is not solving the problem?
Thanks.
log.txt (383.7 KB)

2

Have you made any modifications to the block design?

Do you have a valid Vivado license to build for this device?

3

Hello Mario , yes I recieved a licens but didnt activated it yet.

You think I am got these error becasue I didt activated yet the academy license ?
thanks.

4

You need a valid license to synthetize the design. Lack of a valid license it is likely the cause of this issue.

You will also need a valid license for the CMAC https://www.amd.com/en/products/adaptive-socs-and-fpgas/intellectual-property/cmac_usplus.html