PYNQ: PYTHON PRODUCTIVITY FOR ZYNQ

.tcl or .hwh file needed

I have top level rtl module consist of two black boxes. After synthesis, I read checkpoints, which are OOC implementation, into black boxes. Routed and generated bit stream. For this design, how can i generate .tcl or .hwh??

Have you generated a block diagram? You need this for a Zynq design, to add the PS.
Once you do this, you can Export the Tcl for the Block Diagram.
When you generate the bitstream, the HWH will be generated. Rather than try to figure out the exact path where this will be generated, it may be easiest to search your project folder for the HWH, and copy it out.
If you have more than one HWH, the top level HWH should be clear from the file name/locaiton.
If you have any problems, please report back.

Cathal

Thanks for quick response.

One of my black box contains PS and other AXI peripherals. Other black box has some logic. Both are already placed and routed in OOC. In my top design, I just need to connect these two black box.

Flow:

  1. I synthesized top level RTL with two black box
  2. Open synthesized design and read .dcp files into black box
  3. route_design
  4. Write_bitstream

I do not have block design in this case. Is there a way to work only with .bit in PYNQ?

I also tried creating a block design and added two black box with interface. Open synthesized design and read .dcp file into black box. Close synthesized design. But, black box has not updated with DCP contents. It remains black box. I do not know how to solve this issue also.

OK, I don’t think you will be to generate the files PYNQ needs easily.
Your PS will have a BD. Can it see peripherals in its memory map? If so, you may be able to export this and reuse it, but from what you described I don’t think this will work.
How are you writing software for this design?

You can provide a “dummy” .tcl, to just use the .bit, but you lose the ability to introspect your design and other features of PYNQ (e.g. auto driver assignment)- you would effectively need to hard code peripheral addresses and other info.

I think you should be able to use a empty .tcl file. Just match the filename. This would allow you to download the .bit

Cathal