Hi,
From Partial Reconfiguration — Python productivity for Zynq (Pynq), I am aware that I need .hwh file for partial bitstream as well as partial bitstream itself.
I know that .hwh file is auto-generated when we do “generate outputs” in Vivado block diagram.
In my case, .hwh file for the full bitstream is generated, but if I want .hwh files for partial bitstreams too, do I need to create separate block diagram for reconfigurable partition and then do “generate outputs”? If I do that, I am worried that there could be address assignment mismatch between partial block diagram and the top level block diagram.
Thanks in advance.