Hello, I’m tring to add my design in the tutorial design. But the output image was cut. The following is the step that I did.
- rebuild the base.tcl
- I connect my design to Zynq UltraScale+ MPSoC using DMA, the picture will show the pins I connect
- Double click the cpu and find PS-PL Configuration then choose the AXI HPM0 FPD, AXI HPC0 FPD and AXI HPC1 FPD
- Then connect the pins. The detail can saws in the picture.
Then I put the bitstream on the board, and start it. But The output image was wrong. This code was the same then I doing this in PYNQ Z2.
Is some pins was connected wrong? or Is some setup was wrong?base.pdf (358.5 KB)