Hello, I am trying to implement the stereolbm algorithm from the Vitis Vision Library. I am working with an Ultra96v2 (PYNQ version 2.5), Vitis HLS 2023.2, and Vivado 2023.2. I followed a tutorial that allowed me to modify the source file to implement HLS stream and DMA. When I try to transfer the…

Hi @marioruiz , I wanted to tell you thai I solved the problem. Thanks anyway for your support!

Hi, thank you for your reply. This is the tutorial that I followed: https://community.element14.com/technologies/fpga-group/b/blog/posts/zynq-stereo-camera-platform---part2-stereolbm-with-vitis-vision-libraries?focus=true

Hi @T_A , For that example, they are using Vivado 2020.1 StereoIPcores_MPSOC/stereolbm.tcl at main · Q-point/StereoIPcores_MPSOC · GitHub The constructs that you’re using the HLS code are will not work in the Vitis HLS 2023.2 Mario

Thank you for your reply. Can you tell me how to modify it to make it work? In general, how to change the functions of Vitis Vision Library to have the axi stream interface?

You can see how I did it here PYNQ_Composable_Pipeline/src/erode/erode.cpp at v1.1.0-dev · Xilinx/PYNQ_Composable_Pipeline · GitHub

Thank you. I edited the HLS file and am now able to see Tlast. In the notebook, however, I get stuck in wait().I’ve read that using wait() and PYNQ 2.5 always results in my error. The solution seems to be to move to PYNQ 2.4 Any help? Thank you

I wrote an extensive piece on debugging DMA issues, this is most likely because the video signaling are not working as expected. [image] Debugging Common DMA Issues [Part 3] Learn Debugging Common DMA Issues If you frequent the PYNQ forum, one of the most comm…

I’m sorry, I’ve already read this post several times without finding the answer to my problem. Sharing my notebook, hope it helps. stereoLBM_PYNQ_Test.ipynb (231.2 KB)

In which wait is your code hanging? You should do first output_dma.recvchannel.transfer(out_buffer) then output_dma.recvchannel.wait() You may also want to check that the register mapping is correct. Instead of using the offset, I suggest you use the register_map Mario

Hi, I really appreciate your help. Unfortunately, I have problems with each of the three wait()s in my code. Also, I checked the PYNQ version and it’s not 2.5, but 2.4. Thanks so much again.

I just noticed that if I try to use register_map with the bitdepth ip it gives me this error: AttributeError: ‘Registerwidth’ object has no attribute ‘_buffer’. Can this information help?

Tlast signal and Vitis HLS

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marioruiz October 29, 2024, 2:10pm 8

I wrote an extensive piece on debugging DMA issues, this is most likely because the video signaling are not working as expected.

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Tlast signal and Vitis HLS

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