Trace analyzer IP

I’m looking for a way to capture data on IO input. I figured I could use the existing trace analyzer from base overlay, so I followed the guide here by @cathalmccabe up to the point when one loads the Base overlay in Vivado Hlx. My idea was to strip away everything but the trace analyzer blocks to see if/how I can connect that to my own IP.

But the tutorial in the video only works for Vivado 2020.1, I have 2019.1 installed. Can anyone point out the commit in the Pynq-repo where one can source build_ip.tcl and base.tcl in Vivado 2019.1?

Other suggestions of importing the trace analyzer as an IP are of course very welcome.

Hi @nickcamel, you can use the tag feature of Git to search for a particular version.

pynq 2.5.1 uses Vivado 2019.1 GitHub - Xilinx/PYNQ at v2.5.1


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Can confirm. Use the Glasgow version and you will be good to go.

Ironically, I am trying to get the ILA Core to trigger on my own IP as well. Its been…interesting.

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