Triggering Partial Reconfiguration with Jupyter Notebook

monkeyboyfr3sh · December 31, 2020, 3:11pm

Hi,

I’m attempting to complete partial reconfiguration using Jupyter notebooks. When I read the documentation, it says to

users have to set the partial region for the overlay before they can reconfigure it

overlay.set_partial_region('block_0')

After the partial region is set, users can use the download() method for partial bitstreams.

overlay.download('rm_0_partial.bit')

So I’ve attempted this with my own partial reconfiguration project:

Each toggle block has been marked as a reconfigurable partition of PR_LED_PE that has simple timers to change the brightness of the LED connected using PWM.

But when I try to set the partial region this is my error, seeming that the method doesn’t even exit.

After looking at the library, it doesn’t look like this method is notated anywhere.

So, how do I trigger partial reconfiguration in jupyter noteboooks if I have the partial bit stream files already figured out? I’ve tested my design by uploading partial bitstreams from Vivado and they work as intended.

monkeyboyfr3sh · January 6, 2021, 4:03pm

Checking back to see if anyone has some insight. After looking around some more it seems Xilinx offers some DFX IPs which should aid in triggering scheduled reconfiguration for runtime, but I’m still interested in doing this via jupyter note books at the moment. Any ideas?

monkeyboyfr3sh · February 7, 2021, 11:33pm

@rock

Sorry to bug. I’ve been trying to solve this issue and I’m pretty lost. Any suggestion on triggering PR via jupyter notebooks? The documentation seems to have some holes

marioruiz · February 8, 2021, 4:45pm

Hi,

Have you tried with pr_download?

github.com

Xilinx/PYNQ/blob/master/pynq/overlay.py#L425


      
                      if enable:
                          Clocks.set_pl_clk(i, div0, div1)
                      else:
                          Clocks.set_pl_clk(i)
          
          
    super().download(self.parser)
              if dtbo:
                  super().insert_dtbo(dtbo)
              elif self.dtbo:
                  super().insert_dtbo()
          
          
def pr_download(self, partial_region, partial_bit, dtbo=None):
              """The method to download a partial bitstream onto PL.
          
          
    In this method, the corresponding parser will only be
              added once the `download()` method of the hierarchical block is called.
          
          
    This method always uses the parameter `dtbo` to configure the device
              tree.
          
          
    Note

In your case

overlay.pr_download(<partial_region>,<partial_bistream>)

Mario

monkeyboyfr3sh · February 8, 2021, 11:41pm

So I did try this method but I think I am unable to mark partial regions for Pynq as my PR regions are not in my block diagram. Currently these blocks are outside of the block diagram and connected with a top wrapper.

The block in red is what I would like to become PR. I think I’m actually supposed to have this block internal to the BD but I can’t seem to get this done and have not found solid information on how to do so. When I mark the region as PR, it says that Any suggestions?

marioruiz · February 9, 2021, 8:46am

I believe this is not supported, since pynq is expecting the PR regions to be part of the hierarchy in the IP Integrator.

monkeyboyfr3sh · February 9, 2021, 9:39pm

See, this PR region in the IP integrator region is my issue. When I define a module as a reconfigurable partition, I am no longer able to drag it to the block design hierarchy. Am I supposed to make the module into an IP and there is some setting I can’t find within the IP editor?

monkeyboyfr3sh · February 9, 2021, 10:06pm

The PR ip shown in this comment, how do I create this? I’m pretty sure if I could get this in the design then it would be exposed for pynq to be a partial region.

marioruiz · February 10, 2021, 8:49am

Hi,

Once you have a hierarchy in your block design, right click on it and select Create Partition Definition after that you can add reconfigurable modules to it.

For further questions about DFX (partial reconfiguration) I suggest Xilinx forums.

Mario

lelouch · March 7, 2021, 7:08pm

I suggest you watch these tutorials on Xilinx DFX, they may help:

Topic		Replies	Views
Pr_download is failed (partial reconfiguration) Support	12	1516	March 25, 2021
Partial reconfiguration - PYNQ Z1 Support	0	637	September 30, 2020
Partial Reconfiguration via ICAP Support	3	198	November 30, 2023
Accelerating the partial reconfiguration process? Support	0	401	September 28, 2021
PYNQ Reconfiguration Mechanism? Support	5	1101	October 25, 2019

Triggering Partial Reconfiguration with Jupyter Notebook

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