PYNQ: PYTHON PRODUCTIVITY FOR ZYNQ

Ultra96, Pynq Overlay, Enable PL HD_GPIOs

Hello
I am using the Ultra96 board with Pynq:
(PYNQ Linux, based on Ubuntu 18.04 (GNU/Linux 4.14.0-xilinx-v2018.3 aarch64))

I just have a basic issue with the assignment of the PL HD_GPIOs.

First I need a hint where to find the default base.bit file. Then I need to know how to adapt it to assign the mentioned GPIOs 0-14 to be able to control them over Python.

Have someone an example bit file?
Thanks in advance.

Roger

Hi Roger,
You can find PYNQ docs related to the Ultra96 here: https://ultra96-pynq.readthedocs.io/en/latest/

If you want to change pin assignments, the project files for the base overlay are here:


(This can be found from the previous link)

Cathal

Thank you for your feedback.

I checked the pages already, but I still need some add support.
for example:

  • Can I adapt the .bit files on the pynq directly without vivado? (dont understand the doc in details)
  • If yes, where I have to add the GPIO Configuration?

Regards
Roger

What do you want to do with the board?

You need to modify the design in Vivado if you want to change the design, but you may not need to do this.

Cathal

I will have a simple Python programm running on the PS (pynq) part, which needs to control 14 GPIOs (as output (0/1)) which are on the PL side (HD_gpio_0 - 14).

If you want to build your own design, I suggest you install Vivado, and follow the instructions to rebuild the existing base design.

You could try follow parts of this tutorial to add an AXI GPIO controller to connect to the pins you need:


(You only need 1 AXI GPIO controller, and you don’t need the BRAM controller).

Cathal

Thank you. Now the bit tcl and hwh files are done and in the pynq dir.
Now I have to load the Overlay (design_1.bit) file over the /pynq/overlay.py?

Yes, just add the path to your .bit when instantiating the overlay
overlay = Overlay("./path/to/my.bit")

https://pynq.readthedocs.io/en/v2.4/pynq_overlays/loading_an_overlay.html

Cathal

Hello

So,now it worked so far.
But I only see 1 axi_gpio:image
instead of 14.with the “overlay.ip_dict.keys()”
How can I see all listed?

Wih kind regards
Roger

You should only have one controller, connected to 14 pins.

If you use the PYNQ AXI GPIO class, you could write 0x3fff, to set all the pins to 1.

Some other material/examples here of AXI GPIO

Cathal

It looks good. Have to adjust some Pins, will give you a feedback next week.
Thanks a lot so far, was a great help!

Regards
Roger