PYNQ: PYTHON PRODUCTIVITY

Using migen and chisel on pynq boards

Hi,

The pynq package allows us to interact with the PS and PL quite well.

Just out of curiosity, I wanted to know if we could write the verilog codes for the PL in the new languages like migen and chisel on pynq supported boards.

Is it possible? Is it a good idea to pursue?

Hardware design is orthogonal to PYNQ. You can choose to build the PL design any way you want. Ultimately these languages generate RTL. As long as you import the generated IP into an IPI block diagram in Vivado, you can use the design with PYNQ.
There is more detail to consider, but at a high level, yes, it should be possible.
Is it a good idea? I don’t know :wink:

Cathal

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