Verify Output-Only Designs by using DMA

Hi Guys ,
I would like to know if it is possible to use DMA to verify my IP output without giving a data steam from processor .
Since my design already includes initial memory as a input data , it only needs clk and rstn.
So I made a BD with a counter to simulate this situation as figure below.


But it didn’t work . Besides, I saw the most of the cases connect a loop from MMSM to input.
Can anyone give me some ideas ?
Many thanks !

If your IP only has an output stream then you can use the DMA (receive channel) to receive data from your IP. You don’t need to enable the MM2S ports on the DMA.

You haven’t given any detail about what you tried, or at what point your design doesn’t work. If you can provide more detail on this we can try help.

Cathal