I am new to this forum. I am working on Artix-7 (XC7a75tfgg676-2L) board with Verilog/VHDL. I am new to using the Vitis HLS 2021.1. I am trying to implement image processing using Verilog but facing using issue with size of the image.
While checking for solutions I found about Vitis HLS. When I am browsing for support, I am finding all related to Linux platform but not for Windows. Is that true? Kindly help me on it.
Also, Vitis HLS doesn’t it support Artix-7?
I also followed the steps and examples of xfopencv but getting errors while synthesizing. Any help in working on IP generation and usage of it on my FPGA?
Thanks & Regards
Welcome to PYNQ Forum. The question is not related to PYNQ at all. You should ask some other forum. Just to give you a heads up:
It does support board you mentioned.
xfopencv is quite old and as far as i remember it does support only old vivado hls, not current vitis hls. You should try new vitis vision library instead.
Thanks for the response. Sorry for the wrong question.
Would you let me know the Forum if possible?
By forum, i meant, other sites where you get support like Xilinx forum, Reddit, or quora. This site is for Pynq-related support and inquiries.
Thanks for the response. I will check there.