Vivado License Type for RFSoC4x2

[RJ_Pisani]

My goal is to extend the RFSoC-4x2 PYNQ base overlay by adding AXI MM2S DMA → AXIS FIFO → RFDC DAC S_AXIS so I can stream my own samples (e.g., a 50% duty square) to the DAC. The built in RFDC mixer/NCO only generates a sine, so DMA (or a PL LUT) is needed for a square.

Here is my setup:

• Board: RFSoC-4x2 (XCZU48DR-2FFVG1517)

• Image: RFSoC-PYNQ

• Host: Windows 11

• Vivado: 2022.1 Standard (also have 2025.1 installed but I rolled back to 2022.1)

• Sources: RFSoC-PYNQ/boards/RFSoC4x2/base (downloaded from GitHub)

My Steps:

1. Launch Vivado 2022.1 (settings64.bat→ vivado)

2. version -short (It returns correct 2022.1 version)

3. using Tcl console in C:/PYNQ Projects/RFSoC-PYNQ/RFSoC-PYNQ-master/boards/RFSoC4x2/base I run :source ./base.tcl

and I receive the following error

cd {C:\PYNQ Projects\RFSoC-PYNQ\RFSoC-PYNQ-master\boards\RFSoC4x2\base}
pwd
C:/PYNQ Projects/RFSoC-PYNQ/RFSoC-PYNQ-master/boards/RFSoC4x2/base
source ./base.tcl
# namespace eval _tcl {
# proc get_script_folder {} {
#    set script_path [file normalize [info script]]
#    set script_folder [file dirname $script_path]
#    return $script_folder
# }
# }
# variable script_folder
# set script_folder [_tcl::get_script_folder]
# set scripts_vivado_version 2022.1
# set current_vivado_version [version -short]
# if { [string first $scripts_vivado_version $current_vivado_version] == -1 } {
#    puts ""
#    catch {common::send_gid_msg -ssname BD::TCL -id 2041 -severity "ERROR" "This script was generated using Vivado <$scripts_vivado_version> and is being run in <$current_vivado_version> of Vivado. Please run the script in Vivado <$scripts_vivado_version> then open the design in Vivado <$current_vivado_version>. Upgrade the design by running \"Tools => Report => Report IP Status...\", then run write_bd_tcl to create an updated script."}
# 
#    return 1
# }
# set_param board.repoPaths board_files/rfsoc4x2/1.0/
# set overlay_name base
# set list_projs [get_projects -quiet]
# if { $list_projs eq "" } {
#    create_project  ${overlay_name} ${overlay_name} -part xczu48dr-ffvg1517-2-e
#    set_property BOARD_PART realdigital.org:rfsoc4x2:part0:1.0 [current_project]
# }
WARNING: [Device 21-436] No parts matched 'xczu48dr-ffvg1517-2-e'
ERROR: [Coretcl 2-106] Specified part could not be found.

Running get_parts *zu48dr* returns no board. Then I tried to add the board to Vivado. I went to Help → Add Design Tools or Devices…, but the RFSoC devices are greyed out under my Vivado ML Standard edition.

Questions

1. Do I need Vivado ML Enterprise (eval or full) to target RFSoC devices for this build?

2. Is there a sanctioned way to build the base overlay with Standard (e.g., alternate device packs), or a prebuilt base+DMA bit/hwh I can use?

3. Assuming Enterprise is required, once I add Zynq UltraScale+ MPSoC and RFSoC devices in 2022.1, is there anything else I should watch for when wiring DMA (MM2S only, SG off, MM=64, AXIS=16) → AXIS FIFO (16-bit) → RFDC DAC S_AXIS, with AXI on FCLK0 and the stream on the DAC fabric clock?

Thanks!

[cathalmccabe]

You do need an enterprise license. If you are an academic user, you can request a license here:

https://www.amd.com/en/corporate/university-program/donation-program.html

From the error message, it looks like you haven’t installed the RFSoC devices in Vivado. You need to make sure you install those once you get your license. In Vivado, Vivado > Help > Add Design Tools or Devices

Cathal

[RJ_Pisani]

Thanks for confirming that I need an enterprise license, and yes I was unable to add the board because I am using the standard license.

Thank you,

RJ