ZCU111 DAC Sampling rate not changing

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Hi all,

I’m using the ZCU111 with Pynq 3.0 installed (pre-built image from site). I installed the QPSK example (GitHub - strath-sdr/rfsoc_qpsk: PYNQ example of using the RFSoC as a QPSK transceiver.) and have been modifying it to my application (arbitrary waveform generator). I basically added something similar to what the RFSoC-MTS example does on the RFSoC 4x2, and I’m managing to create a sine wave without issue.

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I managed to set the transfer from Jupyter notebook to the memory and then to the DAC. My problem is that the sampling rate associated with the sine wave I’m generating is not consistent with any of the settings I use, getting a fairly random ~1.6 GSps. By using the settings from the QPSK example that sets the clocks to 409.6 MHz I should be able to get up to 6.144 GSps on the sampling rate, but it’s stuck in that ~1.6.

Moreover, I see that the signal generated from the DAC and the clock generated by the data converter are not locked, when they should be. I even tried setting my own LMK and LMX settings to generate 100 and 250 MHz respectively, from which I see a change in the output clock generated by the dac (dac_clk1), but I don’t see the sampling rate change.

Any ideas what this might be?

Thanks,
Matías

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After doing a bit more checking, turns out I was setting the sine waveform incorrectly. I managed to set the whole system up to work with sine waves.

Now, on the other hand, when settnig inidivual bits to create a square wave, I see a wave that is 1/4th of the sampling rate I’m supposed to be seeing. So the sine wave is reconstructed perfectly, but not the square wave.