Hi there, I have a very strange problem with AXI DMA in all modes. I have a custom AXIS IP generating packets of 255 bytes with TLAST. The IP connects to AXI DMA with the shown parameters (but I obtained the same problem in SG mode and for AXIS of 32 bits) [AXI_DMA Parameters] The DMA connects …

Thank you very much. It finally works. Definitely, in Red Pitaya 125-14 one must use 64bit-wide HP ports. It could be very useful for Zynq newbies like as me. :slight_smile:

Zynq7000: Data loss in HP Stream from AXI DMA

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PeterOgden September 30, 2021, 12:27pm 2

Can you try the solution in Vector addition, correct output only on every other elements

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Zynq7000: Data loss in HP Stream from AXI DMA

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