I have project where I have to work with Ethernet frame only with a FPGA (PL part). It is possible to use PHY module (MIO) with PL part? Or it is possible to redirect MIO PHY (ethernet) ports throughout EMIO port?
I have already researched in the documentation and for me it’s not possible.
PhY(Ethernet) is connected to MIO port and PL is connected to EMIO port. I found this in the document ug585-Zynq-7000-TRM.pdf
Thank you !