<custom board, pynq v2.6>
i have a vivado project where smpte uhdsdi tx ss ip has been used. I want to read the register information of it. But unfortunately it is not able to read the register value. Just to mention i am not facing any problem with reading value from other IPs. I am getting following error in command line:
I am not talking about other ip’s. If you go through my first post, you can see I already have stated it. I have some custom IPs in my design as well. Those don’t have any problems, nor do other IPs from Xilinx. Just this particular ip is showing the issue.
As you had mentioned, particular IP, aka IP(s) you found had problem might had protocol issues.
How do you know it is not the case?
I do read your initial post issue, so that IP showing such issue is possibly having such issue.
Remember this is PYNQ related forum, so PYNQ Python layer itself had no issue AKA software is stable and sanity must be passed (unless there are very very special cases).
You had double confirmed as well, as your IPs do show no issues.
Or let me make this more clear:
IP from who the hell created might have issue
The connection of AXI-Lite might have misaligned setting or other protocol mismatch
The register control of IP is causing such protocol misalignment (dynamic configured bus)
So unless there are fine detail on these factor and yet off topic to PYNQ forum, it is better to confirm via IP example and familiar yourself with those IP you are using.