I’m a beginner and would like to create simple hardware designs in Vivado for the Zynq-7000 SoC device on the PYNQ-Z1 board. For now, I want to work only with the PL (FPGA) side of the chip, without using the PS. My goal is to learn from basic FPGA examples in Verilog that use an external clock input (e.g., counters, tone generators, etc.).
After checking the PYNQ-Z1_Board_Schematic_Rev_F.pdf, I noticed on Sheet 9 that there is an external oscillator connected to the Zynq-7000 package pin H19.
Is this clock signal appropriate for simple PL-only learning projects, or is there another clock source on the board that you would recommend instead?
Thanks in advance for any guidance!
