I am developing a simple design to test the vivado fft block. I connect my fft directly to the DMA and I simply run some transformations of my signals. I have already tested my design in PYNQ and in works perfectly.
However I was trying to analyze how the input data width of my fft impacted the output resolution. I have been able to test my design for data widths that are padded to a power of 2 (as an example, 16bits input data width is padded to 32, 25bits input data width is padded to 64bits).
However if I select a data width equal to 17, my stream is padded to 48bits, and I am not able to connect it to my DMA.
How can I solve this problem? Is there a way to connect the 2 IPs?
Here is my design