I am trying to pass an array of numbers to the DMA and then add a number to each of them in the PL and then pass it back to the PS, however, I am getting a DMA channel not idle error, when I have put implemented logic for TLAST, TKEEP, TVALID and TREADY: module adder#(parameter DATA_WIDTH=32, CAPAC…

Hi @rgbblue , I wrote a blog series describing common DMA issues. [image] Debugging Common DMA Issues [Part 3] Learn Debugging Common DMA Issues If you frequent the PYNQ forum, one of the most common questions/issues we get is why DMA transfer do not work. In …

Hi, thank you for the link, I still can’t seem to solve the issue, I can receive some data - albeit incorrect data. As in I receive an array of 0s instead of 21s, then the first element becomes 240 and then increases by 20 and later 40 each time. Then after a few runs - when the first element is 500…

You indicated that you have designed your own HDL module, so I suggest you verify that this module is handling the AXI4-Stream channel correctly.

Hi, Have you tried with another value of data_size, like 200?

DMA channel not IDLE error with custom IP

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marioruiz July 17, 2024, 7:59am 2

Hi @rgbblue,

I wrote a blog series describing common DMA issues.

Mario

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DMA channel not IDLE error with custom IP

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